DESIGN OF ADVANCED PERIPHERAL BUS FOR UNIVERSAL ASYNCHRONOUS RECEIVER-TRANSMITTER

  • Type: Project
  • Department: Mass Communication
  • Project ID: MAS1769
  • Access Fee: ₦5,000 ($14)
  • Pages: 6 Pages
  • Format: Microsoft Word
  • Views: 386
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The huge progress of VLSI technology enables the integration of millions of transistor on a single chip called System on chip (SoC).The SoC uses AMBA (Advanced Microcontroller Bus Architecture) as on chip bus protocol. AMBA’s specifications define five buses/interfaces: Advanced extensible Interface (AXI), Advanced High-performance Bus (AHB), Advanced System Bus (ASB), Advanced Trace Bus (ATB), and Advanced Peripheral Bus (APB). AXI, AHB, ASB, ATB which are high performance buses used to interface High speed Processor with DMA devices, ROM, on chip RAM etc. Whereas APB is low performance, low peripheral bandwidth bus and is used to connect with slaves like UART (Universal Asynchronous Receiver-Transmitter), Timer, Keypad and Interrupt Controller etc. In this work the design of APB for UART is designed to communicate data between SoC functional blocks with external input output peripherals.

DESIGN OF ADVANCED PERIPHERAL BUS FOR UNIVERSAL ASYNCHRONOUS RECEIVER-TRANSMITTER
For more Info, call us on
+234 8130 686 500
or
+234 8093 423 853

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  • Type: Project
  • Department: Mass Communication
  • Project ID: MAS1769
  • Access Fee: ₦5,000 ($14)
  • Pages: 6 Pages
  • Format: Microsoft Word
  • Views: 386
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    Details

    Type Project
    Department Mass Communication
    Project ID MAS1769
    Fee ₦5,000 ($14)
    No of Pages 6 Pages
    Format Microsoft Word

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